From 39bc4461642eaaf993d0a6cf772d51cdde8c0ae8 Mon Sep 17 00:00:00 2001 From: Joao Lima Date: Tue, 30 Sep 2025 12:13:30 +0000 Subject: [PATCH 2/2] tcl/target/ti_k3.cfg: Add support for direct memory access via SWD Adds support for direct memory access via SWD emulation for AM64x and J784s4 boards, configuring addresses and parameters required for direct memory operations. Upstream-Status: Submitted [http://openocd.zylin.com/#/c/9021/] Change-Id: Iebc16612b3990b2ef19ddc4143b66ab1bcbfe0f3 Signed-off-by: Joao Lima --- tcl/target/ti_k3.cfg | 22 +++++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-) diff --git a/tcl/target/ti_k3.cfg b/tcl/target/ti_k3.cfg index 0dee74e5e..6b0ac2e52 100644 --- a/tcl/target/ti_k3.cfg +++ b/tcl/target/ti_k3.cfg @@ -176,6 +176,16 @@ switch $_soc { # Uses the same JTAG ID set _armv8_cores 0 } + + # Setup DMEM access descriptions + # DAPBUS (Debugger) description + set _dmem_base_address 0x740002000 + set _dmem_ap_address_offset 0x100 + set _dmem_max_aps 10 + # Emulated AP description + set _dmem_emu_base_address 0x760000000 + set _dmem_emu_base_address_map_to 0x1d500000 + set _dmem_emu_ap_list 1 } am625 { set _K3_DAP_TAPID 0x0bb7e02f @@ -333,7 +343,7 @@ switch $_soc { set ARMV8_CTIBASE {0x90420000 0x90520000 0x90620000 0x90720000 0x90820000 0x90920000 0x90a20000 0x90b20000} - # J721s2 has 4 clusters of 2 R5 cores each. + # J784s4 has 4 clusters of 2 R5 cores each. set _r5_cores 8 set R5_DBGBASE {0x9d010000 0x9d012000 0x9d410000 0x9d412000 @@ -348,6 +358,16 @@ switch $_soc { main1_r5.0 main1_r5.1 main2_r5.0 main2_r5.1} + # Setup DMEM access descriptions + # DAPBUS (Debugger) description + set _dmem_base_address 0x4c40002000 + set _dmem_ap_address_offset 0x100 + set _dmem_max_aps 8 + # Emulated AP description + set _dmem_emu_base_address 0x4c60000000 + set _dmem_emu_base_address_map_to 0x1d600000 + set _dmem_emu_ap_list 1 + # sysctrl CTI base set CM3_CTIBASE {0x20001000} # Sysctrl power-ap unlock offsets